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From e3a67519ffcf03c2a3c36ed7cc41580ddc69f35e Mon Sep 17 00:00:00 2001 |
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From: Suzuki K Poulose <suzuki.poulose@arm.com> |
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Date: Tue, 9 Oct 2018 14:47:05 +0100 |
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Subject: [PATCH 008/145] arm64: cpufeature: ctr: Fix cpu capability check for |
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late CPUs |
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|
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[ Upstream commit 8ab66cbe63aeaf9e5970fb4aaef1c660fca59321 ] |
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|
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The matches() routine for a capability must honor the "scope" |
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passed to it and return the proper results. |
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i.e, when passed with SCOPE_LOCAL_CPU, it should check the |
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status of the capability on the current CPU. This is used by |
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verify_local_cpu_capabilities() on a late secondary CPU to make |
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sure that it's compliant with the established system features. |
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However, ARM64_HAS_CACHE_{IDC/DIC} always checks the system wide |
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registers and this could mean that a late secondary CPU could return |
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"true" (since the CPU hasn't updated the system wide registers yet) |
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and thus lead the system in an inconsistent state, where |
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the system assumes it has IDC/DIC feature, while the new CPU |
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doesn't. |
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|
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Fixes: commit 6ae4b6e0578886eb36 ("arm64: Add support for new control bits CTR_EL0.DIC and CTR_EL0.IDC") |
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Cc: Philip Elcan <pelcan@codeaurora.org> |
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Cc: Shanker Donthineni <shankerd@codeaurora.org> |
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Cc: Mark Rutland <mark.rutland@arm.com> |
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Cc: Will Deacon <will.deacon@arm.com> |
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Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> |
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Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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Signed-off-by: Sasha Levin <sashal@kernel.org> |
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--- |
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arch/arm64/kernel/cpufeature.c | 22 ++++++++++++++++++---- |
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1 file changed, 18 insertions(+), 4 deletions(-) |
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|
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diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c |
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index e238b7932096..93f69d82225d 100644 |
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--- a/arch/arm64/kernel/cpufeature.c |
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+++ b/arch/arm64/kernel/cpufeature.c |
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@@ -848,15 +848,29 @@ static bool has_no_fpsimd(const struct arm64_cpu_capabilities *entry, int __unus |
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} |
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|
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static bool has_cache_idc(const struct arm64_cpu_capabilities *entry, |
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- int __unused) |
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+ int scope) |
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{ |
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- return read_sanitised_ftr_reg(SYS_CTR_EL0) & BIT(CTR_IDC_SHIFT); |
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+ u64 ctr; |
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+ |
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+ if (scope == SCOPE_SYSTEM) |
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+ ctr = arm64_ftr_reg_ctrel0.sys_val; |
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+ else |
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+ ctr = read_cpuid_cachetype(); |
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+ |
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+ return ctr & BIT(CTR_IDC_SHIFT); |
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} |
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|
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static bool has_cache_dic(const struct arm64_cpu_capabilities *entry, |
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- int __unused) |
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+ int scope) |
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{ |
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- return read_sanitised_ftr_reg(SYS_CTR_EL0) & BIT(CTR_DIC_SHIFT); |
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+ u64 ctr; |
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+ |
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+ if (scope == SCOPE_SYSTEM) |
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+ ctr = arm64_ftr_reg_ctrel0.sys_val; |
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+ else |
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+ ctr = read_cpuid_cachetype(); |
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+ |
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+ return ctr & BIT(CTR_DIC_SHIFT); |
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} |
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|
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#ifdef CONFIG_UNMAP_KERNEL_AT_EL0 |
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-- |
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2.19.1 |
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