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From fb32abcf0ebc895d1f479bef345e32923bf16eef Mon Sep 17 00:00:00 2001 |
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From: Masahiro Yamada <yamada.masahiro@socionext.com> |
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Date: Fri, 28 Sep 2018 13:16:01 +0900 |
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Subject: [PATCH 026/145] mtd: rawnand: denali: set SPARE_AREA_SKIP_BYTES |
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register to 8 if unset |
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|
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[ Upstream commit 0d55c668b218a1db68b5044bce4de74e1bd0f0c8 ] |
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|
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NAND devices need additional data area (OOB) for error correction, |
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but it is also used for Bad Block Marker (BBM). In many cases, the |
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first byte in OOB is used for BBM, but the location actually depends |
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on chip vendors. The NAND controller should preserve the precious |
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BBM to keep track of bad blocks. |
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|
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In Denali IP, the SPARE_AREA_SKIP_BYTES register is used to specify |
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the number of bytes to skip from the start of OOB. The ECC engine |
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will automatically skip the specified number of bytes when it gets |
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access to OOB area. |
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|
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The same value for SPARE_AREA_SKIP_BYTES should be used between |
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firmware and the operating system if you intend to use the NAND |
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device across the control hand-off. |
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|
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In fact, the current denali.c code expects firmware to have already |
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set the SPARE_AREA_SKIP_BYTES register, then reads the value out. |
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|
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If no firmware (or bootloader) has initialized the controller, the |
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register value is zero, which is the default after power-on-reset. |
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In other words, the Linux driver cannot initialize the controller |
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by itself. |
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|
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Some possible solutions are: |
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|
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[1] Add a DT property to specify the skipped bytes in OOB |
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[2] Associate the preferred value with compatible |
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[3] Hard-code the default value in the driver |
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|
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My first attempt was [1], but in the review process, [3] was suggested |
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as a counter-implementation. |
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(https://lore.kernel.org/patchwork/patch/983055/) |
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|
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The default value 8 was chosen to match to the boot ROM of the UniPhier |
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platform. The preferred value may vary by platform. If so, please |
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trade up to a different solution. |
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|
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Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
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Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> |
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Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> |
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Signed-off-by: Sasha Levin <sashal@kernel.org> |
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--- |
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drivers/mtd/nand/raw/denali.c | 14 ++++++++++---- |
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1 file changed, 10 insertions(+), 4 deletions(-) |
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|
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diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c |
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index b864b93dd289..2242e999a76b 100644 |
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--- a/drivers/mtd/nand/raw/denali.c |
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+++ b/drivers/mtd/nand/raw/denali.c |
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@@ -28,6 +28,7 @@ |
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MODULE_LICENSE("GPL"); |
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|
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#define DENALI_NAND_NAME "denali-nand" |
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+#define DENALI_DEFAULT_OOB_SKIP_BYTES 8 |
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|
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/* for Indexed Addressing */ |
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#define DENALI_INDEXED_CTRL 0x00 |
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@@ -1105,12 +1106,17 @@ static void denali_hw_init(struct denali_nand_info *denali) |
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denali->revision = swab16(ioread32(denali->reg + REVISION)); |
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|
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/* |
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- * tell driver how many bit controller will skip before |
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- * writing ECC code in OOB, this register may be already |
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- * set by firmware. So we read this value out. |
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- * if this value is 0, just let it be. |
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+ * Set how many bytes should be skipped before writing data in OOB. |
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+ * If a non-zero value has already been set (by firmware or something), |
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+ * just use it. Otherwise, set the driver default. |
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*/ |
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denali->oob_skip_bytes = ioread32(denali->reg + SPARE_AREA_SKIP_BYTES); |
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+ if (!denali->oob_skip_bytes) { |
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+ denali->oob_skip_bytes = DENALI_DEFAULT_OOB_SKIP_BYTES; |
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+ iowrite32(denali->oob_skip_bytes, |
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+ denali->reg + SPARE_AREA_SKIP_BYTES); |
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+ } |
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+ |
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denali_detect_max_banks(denali); |
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iowrite32(0x0F, denali->reg + RB_PIN_ENABLED); |
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iowrite32(CHIP_EN_DONT_CARE__FLAG, denali->reg + CHIP_ENABLE_DONT_CARE); |
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-- |
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2.19.1 |
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