| 1 |
From b711a391b2d14901ed1a55bf4ba8b487ef995232 Mon Sep 17 00:00:00 2001 |
| 2 |
From: Yunsheng Lin <linyunsheng@huawei.com> |
| 3 |
Date: Wed, 26 Sep 2018 19:28:36 +0100 |
| 4 |
Subject: [PATCH 044/145] net: hns3: Fix for packet buffer setting bug |
| 5 |
|
| 6 |
[ Upstream commit 996ff91840eb6f288826e472685abde78bac20ea ] |
| 7 |
|
| 8 |
The hardware expects a unit of 128 bytes when setting |
| 9 |
packet buffer. When calculating the packet buffer size, |
| 10 |
hclge_rx_buffer_calc does not round up the size as a unit |
| 11 |
of 128 byte, which may casue packet lost problem when stress |
| 12 |
testing. |
| 13 |
|
| 14 |
This patch fixes it by rounding up packet size when calculating. |
| 15 |
|
| 16 |
Fixes: 46a3df9f9718 ("net: hns3: Add HNS3 Acceleration Engine & Compatibility Layer Support") |
| 17 |
Signed-off-by: Yunsheng Lin <linyunsheng@huawei.com> |
| 18 |
Signed-off-by: Peng Li <lipeng321@huawei.com> |
| 19 |
Signed-off-by: Salil Mehta <salil.mehta@huawei.com> |
| 20 |
Signed-off-by: David S. Miller <davem@davemloft.net> |
| 21 |
Signed-off-by: Sasha Levin <sashal@kernel.org> |
| 22 |
--- |
| 23 |
.../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 14 ++++++++------ |
| 24 |
1 file changed, 8 insertions(+), 6 deletions(-) |
| 25 |
|
| 26 |
diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c |
| 27 |
index 8577dfc799ad..023910abc831 100644 |
| 28 |
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c |
| 29 |
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c |
| 30 |
@@ -1657,11 +1657,13 @@ static int hclge_tx_buffer_calc(struct hclge_dev *hdev, |
| 31 |
static int hclge_rx_buffer_calc(struct hclge_dev *hdev, |
| 32 |
struct hclge_pkt_buf_alloc *buf_alloc) |
| 33 |
{ |
| 34 |
- u32 rx_all = hdev->pkt_buf_size; |
| 35 |
+#define HCLGE_BUF_SIZE_UNIT 128 |
| 36 |
+ u32 rx_all = hdev->pkt_buf_size, aligned_mps; |
| 37 |
int no_pfc_priv_num, pfc_priv_num; |
| 38 |
struct hclge_priv_buf *priv; |
| 39 |
int i; |
| 40 |
|
| 41 |
+ aligned_mps = round_up(hdev->mps, HCLGE_BUF_SIZE_UNIT); |
| 42 |
rx_all -= hclge_get_tx_buff_alloced(buf_alloc); |
| 43 |
|
| 44 |
/* When DCB is not supported, rx private |
| 45 |
@@ -1680,13 +1682,13 @@ static int hclge_rx_buffer_calc(struct hclge_dev *hdev, |
| 46 |
if (hdev->hw_tc_map & BIT(i)) { |
| 47 |
priv->enable = 1; |
| 48 |
if (hdev->tm_info.hw_pfc_map & BIT(i)) { |
| 49 |
- priv->wl.low = hdev->mps; |
| 50 |
- priv->wl.high = priv->wl.low + hdev->mps; |
| 51 |
+ priv->wl.low = aligned_mps; |
| 52 |
+ priv->wl.high = priv->wl.low + aligned_mps; |
| 53 |
priv->buf_size = priv->wl.high + |
| 54 |
HCLGE_DEFAULT_DV; |
| 55 |
} else { |
| 56 |
priv->wl.low = 0; |
| 57 |
- priv->wl.high = 2 * hdev->mps; |
| 58 |
+ priv->wl.high = 2 * aligned_mps; |
| 59 |
priv->buf_size = priv->wl.high; |
| 60 |
} |
| 61 |
} else { |
| 62 |
@@ -1718,11 +1720,11 @@ static int hclge_rx_buffer_calc(struct hclge_dev *hdev, |
| 63 |
|
| 64 |
if (hdev->tm_info.hw_pfc_map & BIT(i)) { |
| 65 |
priv->wl.low = 128; |
| 66 |
- priv->wl.high = priv->wl.low + hdev->mps; |
| 67 |
+ priv->wl.high = priv->wl.low + aligned_mps; |
| 68 |
priv->buf_size = priv->wl.high + HCLGE_DEFAULT_DV; |
| 69 |
} else { |
| 70 |
priv->wl.low = 0; |
| 71 |
- priv->wl.high = hdev->mps; |
| 72 |
+ priv->wl.high = aligned_mps; |
| 73 |
priv->buf_size = priv->wl.high; |
| 74 |
} |
| 75 |
} |
| 76 |
-- |
| 77 |
2.19.1 |
| 78 |
|
Parent Directory
| 
Revision Log