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From 881eaad34aaa61d318028f1c696815c510c8e110 Mon Sep 17 00:00:00 2001 |
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From: Stephen Boyd <swboyd@chromium.org> |
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Date: Thu, 30 Aug 2018 17:58:52 -0700 |
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Subject: [PATCH 062/145] pinctrl: qcom: spmi-mpp: Fix drive strength setting |
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[ Upstream commit 89c68b102f13f123aaef22b292526d6b92501334 ] |
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It looks like we parse the drive strength setting here, but never |
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actually write it into the hardware to update it. Parse the setting and |
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then write it at the end of the pinconf setting function so that it |
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actually sticks in the hardware. |
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|
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Fixes: 0e948042c420 ("pinctrl: qcom: spmi-mpp: Implement support for sink mode") |
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Cc: Doug Anderson <dianders@chromium.org> |
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Signed-off-by: Stephen Boyd <swboyd@chromium.org> |
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Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> |
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Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Signed-off-by: Sasha Levin <sashal@kernel.org> |
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--- |
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drivers/pinctrl/qcom/pinctrl-spmi-mpp.c | 6 +++++- |
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1 file changed, 5 insertions(+), 1 deletion(-) |
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|
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diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c |
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index 418bc40df7ca..7577f133d326 100644 |
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--- a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c |
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+++ b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c |
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@@ -457,7 +457,7 @@ static int pmic_mpp_config_set(struct pinctrl_dev *pctldev, unsigned int pin, |
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pad->dtest = arg; |
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break; |
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case PIN_CONFIG_DRIVE_STRENGTH: |
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- arg = pad->drive_strength; |
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+ pad->drive_strength = arg; |
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break; |
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case PMIC_MPP_CONF_AMUX_ROUTE: |
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if (arg >= PMIC_MPP_AMUX_ROUTE_ABUS4) |
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@@ -504,6 +504,10 @@ static int pmic_mpp_config_set(struct pinctrl_dev *pctldev, unsigned int pin, |
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if (ret < 0) |
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return ret; |
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|
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+ ret = pmic_mpp_write(state, pad, PMIC_MPP_REG_SINK_CTL, pad->drive_strength); |
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+ if (ret < 0) |
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+ return ret; |
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+ |
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val = pad->is_enabled << PMIC_MPP_REG_MASTER_EN_SHIFT; |
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|
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return pmic_mpp_write(state, pad, PMIC_MPP_REG_EN_CTL, val); |
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-- |
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2.19.1 |
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