/[packages]/cauldron/kernel/current/PATCHES/patches/0067-pinctrl-ssbi-gpio-Fix-pm8xxx_pin_config_get-to-be-co.patch
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Contents of /cauldron/kernel/current/PATCHES/patches/0067-pinctrl-ssbi-gpio-Fix-pm8xxx_pin_config_get-to-be-co.patch

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Revision 1329221 - (show annotations) (download)
Fri Nov 9 22:05:45 2018 UTC (5 years, 10 months ago) by tmb
File size: 2860 byte(s)
add fixes from sashas autosel queue
1 From 7c36514c8b0ab88f58dbff7191f685af1c873ad8 Mon Sep 17 00:00:00 2001
2 From: Douglas Anderson <dianders@chromium.org>
3 Date: Thu, 30 Aug 2018 08:23:38 -0700
4 Subject: [PATCH 067/145] pinctrl: ssbi-gpio: Fix pm8xxx_pin_config_get() to be
5 compliant
6
7 [ Upstream commit b432414b996d32a1bd9afe2bd595bd5729c1477f ]
8
9 If you look at "pinconf-groups" in debugfs for ssbi-gpio you'll notice
10 it looks like nonsense.
11
12 The problem is fairly well described in commit 1cf86bc21257 ("pinctrl:
13 qcom: spmi-gpio: Fix pmic_gpio_config_get() to be compliant") and
14 commit 05e0c828955c ("pinctrl: msm: Fix msm_config_group_get() to be
15 compliant"), but it was pointed out that ssbi-gpio has the same
16 problem. Let's fix it there too.
17
18 Fixes: b4c45fe974bc ("pinctrl: qcom: ssbi: Family A gpio & mpp drivers")
19 Signed-off-by: Douglas Anderson <dianders@chromium.org>
20 Reviewed-by: Stephen Boyd <sboyd@kernel.org>
21 Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
22 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
23 Signed-off-by: Sasha Levin <sashal@kernel.org>
24 ---
25 drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c | 28 ++++++++++++++++++------
26 1 file changed, 21 insertions(+), 7 deletions(-)
27
28 diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
29 index f53e32a9d8fc..0e153bae322e 100644
30 --- a/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
31 +++ b/drivers/pinctrl/qcom/pinctrl-ssbi-gpio.c
32 @@ -260,22 +260,32 @@ static int pm8xxx_pin_config_get(struct pinctrl_dev *pctldev,
33
34 switch (param) {
35 case PIN_CONFIG_BIAS_DISABLE:
36 - arg = pin->bias == PM8XXX_GPIO_BIAS_NP;
37 + if (pin->bias != PM8XXX_GPIO_BIAS_NP)
38 + return -EINVAL;
39 + arg = 1;
40 break;
41 case PIN_CONFIG_BIAS_PULL_DOWN:
42 - arg = pin->bias == PM8XXX_GPIO_BIAS_PD;
43 + if (pin->bias != PM8XXX_GPIO_BIAS_PD)
44 + return -EINVAL;
45 + arg = 1;
46 break;
47 case PIN_CONFIG_BIAS_PULL_UP:
48 - arg = pin->bias <= PM8XXX_GPIO_BIAS_PU_1P5_30;
49 + if (pin->bias > PM8XXX_GPIO_BIAS_PU_1P5_30)
50 + return -EINVAL;
51 + arg = 1;
52 break;
53 case PM8XXX_QCOM_PULL_UP_STRENGTH:
54 arg = pin->pull_up_strength;
55 break;
56 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
57 - arg = pin->disable;
58 + if (!pin->disable)
59 + return -EINVAL;
60 + arg = 1;
61 break;
62 case PIN_CONFIG_INPUT_ENABLE:
63 - arg = pin->mode == PM8XXX_GPIO_MODE_INPUT;
64 + if (pin->mode != PM8XXX_GPIO_MODE_INPUT)
65 + return -EINVAL;
66 + arg = 1;
67 break;
68 case PIN_CONFIG_OUTPUT:
69 if (pin->mode & PM8XXX_GPIO_MODE_OUTPUT)
70 @@ -290,10 +300,14 @@ static int pm8xxx_pin_config_get(struct pinctrl_dev *pctldev,
71 arg = pin->output_strength;
72 break;
73 case PIN_CONFIG_DRIVE_PUSH_PULL:
74 - arg = !pin->open_drain;
75 + if (pin->open_drain)
76 + return -EINVAL;
77 + arg = 1;
78 break;
79 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
80 - arg = pin->open_drain;
81 + if (!pin->open_drain)
82 + return -EINVAL;
83 + arg = 1;
84 break;
85 default:
86 return -EINVAL;
87 --
88 2.19.1
89

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