/[packages]/cauldron/mesa/current/SOURCES/0002-radv-set-the-maximum-number-of-IBs-per-submit-to-192.patch
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Contents of /cauldron/mesa/current/SOURCES/0002-radv-set-the-maximum-number-of-IBs-per-submit-to-192.patch

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Revision 1379265 - (show annotations) (download)
Wed Mar 20 17:08:42 2019 UTC (2 months ago) by tmb
File size: 2270 byte(s)
more fixes from staging/19.0 branch
1 From 93386fbc5e10d943f02f77797a30bf6fabd5bd80 Mon Sep 17 00:00:00 2001
2 From: Samuel Pitoiset <samuel.pitoiset@gmail.com>
3 Date: Tue, 12 Mar 2019 21:49:42 +0100
4 Subject: [PATCH 02/24] radv: set the maximum number of IBs per submit to 192
5
6 This fixes random SteamVR corruption, see
7 https://github.com/ValveSoftware/SteamVR-for-Linux/issues/181
8
9 Fixes: 4d30f2c6f42 ("radv/winsys: remove the max IBs per submit limit for the fallback path")
10 Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
11 Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
12 (cherry picked from commit ae77f1236862e73c1ac250898924c648d481bda4)
13 ---
14 src/amd/vulkan/radv_device.c | 2 +-
15 src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys_public.h | 7 +++++++
16 2 files changed, 8 insertions(+), 1 deletion(-)
17
18 diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
19 index 2075a0ef7a3..f11e5bea4af 100644
20 --- a/src/amd/vulkan/radv_device.c
21 +++ b/src/amd/vulkan/radv_device.c
22 @@ -2794,7 +2794,7 @@ VkResult radv_QueueSubmit(
23 struct radeon_winsys_fence *base_fence = fence ? fence->fence : NULL;
24 struct radeon_winsys_ctx *ctx = queue->hw_ctx;
25 int ret;
26 - uint32_t max_cs_submission = queue->device->trace_bo ? 1 : UINT32_MAX;
27 + uint32_t max_cs_submission = queue->device->trace_bo ? 1 : RADV_MAX_IBS_PER_SUBMIT;
28 uint32_t scratch_size = 0;
29 uint32_t compute_scratch_size = 0;
30 uint32_t esgs_ring_size = 0, gsvs_ring_size = 0;
31 diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys_public.h b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys_public.h
32 index 854e216551f..709669b2a57 100644
33 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys_public.h
34 +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys_public.h
35 @@ -29,6 +29,13 @@
36 #ifndef RADV_AMDGPU_WINSYS_PUBLIC_H
37 #define RADV_AMDGPU_WINSYS_PUBLIC_H
38
39 +/* The number of IBs per submit isn't infinite, it depends on the ring type
40 + * (ie. some initial setup needed for a submit) and the number of IBs (4 DW).
41 + * This limit is arbitrary but should be safe for now. Ideally, we should get
42 + * this limit from the KMD.
43 +*/
44 +#define RADV_MAX_IBS_PER_SUBMIT 192
45 +
46 struct radeon_winsys *radv_amdgpu_winsys_create(int fd, uint64_t debug_flags,
47 uint64_t perftest_flags);
48
49 --
50 2.21.0
51

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