/[packages]/cauldron/mesa/current/SOURCES/0005-glsl-lower_vector_derefs-Don-t-use-a-temporary-for-T.patch
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Contents of /cauldron/mesa/current/SOURCES/0005-glsl-lower_vector_derefs-Don-t-use-a-temporary-for-T.patch

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Revision 1379265 - (show annotations) (download)
Wed Mar 20 17:08:42 2019 UTC (2 months ago) by tmb
File size: 5636 byte(s)
more fixes from staging/19.0 branch
1 From 95b001cb190dbc0ec71d760e1d9c457c1a3e4f70 Mon Sep 17 00:00:00 2001
2 From: Jason Ekstrand <jason.ekstrand@intel.com>
3 Date: Mon, 11 Mar 2019 20:43:15 -0500
4 Subject: [PATCH 05/24] glsl/lower_vector_derefs: Don't use a temporary for TCS
5 outputs
6
7 Tessellation control shader outputs act as if they have memory backing
8 them and you can have multiple writes to different components of the
9 same vector in-flight at the same time. When this happens, the load vec
10 store pattern that gets used by ir_triop_vector_insert doesn't yield the
11 correct results. Instead, just emit a sequence of conditional
12 assignments.
13
14 Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
15 Cc: mesa-stable@lists.freedesktop.org
16 (cherry picked from commit bd17bdc56b34a08c421172df27fe07294c7a7024)
17 ---
18 src/compiler/glsl/lower_vector_derefs.cpp | 74 ++++++++++++++++++++---
19 1 file changed, 64 insertions(+), 10 deletions(-)
20
21 diff --git a/src/compiler/glsl/lower_vector_derefs.cpp b/src/compiler/glsl/lower_vector_derefs.cpp
22 index 6cd9a2d819a..2aae30d8201 100644
23 --- a/src/compiler/glsl/lower_vector_derefs.cpp
24 +++ b/src/compiler/glsl/lower_vector_derefs.cpp
25 @@ -32,8 +32,9 @@ namespace {
26
27 class vector_deref_visitor : public ir_rvalue_enter_visitor {
28 public:
29 - vector_deref_visitor()
30 - : progress(false)
31 + vector_deref_visitor(void *mem_ctx, gl_shader_stage shader_stage)
32 + : progress(false), shader_stage(shader_stage),
33 + factory(&factory_instructions, mem_ctx)
34 {
35 }
36
37 @@ -45,6 +46,9 @@ public:
38 virtual ir_visitor_status visit_enter(ir_assignment *ir);
39
40 bool progress;
41 + gl_shader_stage shader_stage;
42 + exec_list factory_instructions;
43 + ir_factory factory;
44 };
45
46 } /* anonymous namespace */
47 @@ -65,13 +69,63 @@ vector_deref_visitor::visit_enter(ir_assignment *ir)
48 ir_constant *old_index_constant =
49 deref->array_index->constant_expression_value(mem_ctx);
50 if (!old_index_constant) {
51 - ir->rhs = new(mem_ctx) ir_expression(ir_triop_vector_insert,
52 - new_lhs->type,
53 - new_lhs->clone(mem_ctx, NULL),
54 - ir->rhs,
55 - deref->array_index);
56 - ir->write_mask = (1 << new_lhs->type->vector_elements) - 1;
57 - ir->set_lhs(new_lhs);
58 + if (shader_stage == MESA_SHADER_TESS_CTRL &&
59 + deref->variable_referenced()->data.mode == ir_var_shader_out) {
60 + /* Tessellation control shader outputs act as if they have memory
61 + * backing them and if we have writes from multiple threads
62 + * targeting the same vec4 (this can happen for patch outputs), the
63 + * load-vec-store pattern of ir_triop_vector_insert doesn't work.
64 + * Instead, we have to lower to a series of conditional write-masked
65 + * assignments.
66 + */
67 + ir_variable *const src_temp =
68 + factory.make_temp(ir->rhs->type, "scalar_tmp");
69 +
70 + /* The newly created variable declaration goes before the assignment
71 + * because we're going to set it as the new LHS.
72 + */
73 + ir->insert_before(factory.instructions);
74 + ir->set_lhs(new(mem_ctx) ir_dereference_variable(src_temp));
75 +
76 + ir_variable *const arr_index =
77 + factory.make_temp(deref->array_index->type, "index_tmp");
78 + factory.emit(assign(arr_index, deref->array_index));
79 +
80 + for (unsigned i = 0; i < new_lhs->type->vector_elements; i++) {
81 + ir_constant *const cmp_index =
82 + ir_constant::zero(factory.mem_ctx, deref->array_index->type);
83 + cmp_index->value.u[0] = i;
84 +
85 + ir_rvalue *const lhs_clone = new_lhs->clone(factory.mem_ctx, NULL);
86 + ir_dereference_variable *const src_temp_deref =
87 + new(mem_ctx) ir_dereference_variable(src_temp);
88 +
89 + if (new_lhs->ir_type != ir_type_swizzle) {
90 + assert(lhs_clone->as_dereference());
91 + ir_assignment *cond_assign =
92 + new(mem_ctx) ir_assignment(lhs_clone->as_dereference(),
93 + src_temp_deref,
94 + equal(arr_index, cmp_index),
95 + WRITEMASK_X << i);
96 + factory.emit(cond_assign);
97 + } else {
98 + ir_assignment *cond_assign =
99 + new(mem_ctx) ir_assignment(swizzle(lhs_clone, i, 1),
100 + src_temp_deref,
101 + equal(arr_index, cmp_index));
102 + factory.emit(cond_assign);
103 + }
104 + }
105 + ir->insert_after(factory.instructions);
106 + } else {
107 + ir->rhs = new(mem_ctx) ir_expression(ir_triop_vector_insert,
108 + new_lhs->type,
109 + new_lhs->clone(mem_ctx, NULL),
110 + ir->rhs,
111 + deref->array_index);
112 + ir->write_mask = (1 << new_lhs->type->vector_elements) - 1;
113 + ir->set_lhs(new_lhs);
114 + }
115 } else if (new_lhs->ir_type != ir_type_swizzle) {
116 ir->set_lhs(new_lhs);
117 ir->write_mask = 1 << old_index_constant->get_uint_component(0);
118 @@ -105,7 +159,7 @@ vector_deref_visitor::handle_rvalue(ir_rvalue **rv)
119 bool
120 lower_vector_derefs(gl_linked_shader *shader)
121 {
122 - vector_deref_visitor v;
123 + vector_deref_visitor v(shader->ir, shader->Stage);
124
125 visit_list_elements(&v, shader->ir);
126
127 --
128 2.21.0
129

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