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From 6499126ea9ebfe8f1c299603a51cc0bcb8babefb Mon Sep 17 00:00:00 2001 |
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From: Lionel Landwerlin <lionel.g.landwerlin@intel.com> |
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Date: Thu, 3 Jan 2019 16:18:48 +0000 |
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Subject: [PATCH 52/78] i965: add CS stall on VF invalidation workaround |
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|
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Even with the previous commit, hangs are still happening. The problem |
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there is that the VF cache invalidate do happen immediately without |
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waiting for previous rendering to complete. What happens is that we |
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invalidate the cache the moment the PIPE_CONTROL is parsed but we |
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still have old rendering in the pipe which continues to pull data into |
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the cache with the old high address bits. The later rendering with the |
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new high address bits then doesn't have the clean cache that it |
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expects/needs. |
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|
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v2: Update commit message/explanation with Jason's |
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|
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Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> |
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Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> |
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Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> |
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Fixes: a363bb2cd0e2a1 ("i965: Allocate VMA in userspace for full-PPGTT systems.") |
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109072 |
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(cherry picked from commit 31e4c9ce400341df9b0136419b3b3c73b8c9eb7e) |
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--- |
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src/mesa/drivers/dri/i965/genX_blorp_exec.c | 2 +- |
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src/mesa/drivers/dri/i965/genX_state_upload.c | 2 +- |
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2 files changed, 2 insertions(+), 2 deletions(-) |
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|
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diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c |
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index a62b88e166..97ae270704 100644 |
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--- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c |
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+++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c |
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@@ -213,7 +213,7 @@ blorp_vf_invalidate_for_vb_48b_transitions(struct blorp_batch *batch, |
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} |
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|
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if (need_invalidate) { |
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- brw_emit_pipe_control_flush(brw, PIPE_CONTROL_VF_CACHE_INVALIDATE); |
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+ brw_emit_pipe_control_flush(brw, PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_CS_STALL); |
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} |
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#endif |
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} |
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diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c |
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index 28c60c9edf..ce9a3adcfc 100644 |
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--- a/src/mesa/drivers/dri/i965/genX_state_upload.c |
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+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c |
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@@ -534,7 +534,7 @@ vf_invalidate_for_vb_48bit_transitions(struct brw_context *brw) |
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} |
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|
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if (need_invalidate) { |
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- brw_emit_pipe_control_flush(brw, PIPE_CONTROL_VF_CACHE_INVALIDATE); |
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+ brw_emit_pipe_control_flush(brw, PIPE_CONTROL_VF_CACHE_INVALIDATE | PIPE_CONTROL_CS_STALL); |
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} |
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#endif |
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} |
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-- |
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2.20.1 |
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