/[packages]/cauldron/mesa/current/SOURCES/0067-radeonsi-Fix-use-of-1-or-2-component-GL_DOUBLE-vbo-s.patch
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Contents of /cauldron/mesa/current/SOURCES/0067-radeonsi-Fix-use-of-1-or-2-component-GL_DOUBLE-vbo-s.patch

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Revision 1355920 - (show annotations) (download)
Sun Jan 13 14:22:00 2019 UTC (5 years, 2 months ago) by tmb
File size: 3150 byte(s)
add current fixes from upstream staging/18.3 branch
1 From 78dd4d6536db38ec83791c0a81155767a051f156 Mon Sep 17 00:00:00 2001
2 From: Mario Kleiner <mario.kleiner.de@gmail.com>
3 Date: Mon, 7 Jan 2019 19:42:29 +0100
4 Subject: [PATCH 67/78] radeonsi: Fix use of 1- or 2- component GL_DOUBLE
5 vbo's.
6 MIME-Version: 1.0
7 Content-Type: text/plain; charset=UTF-8
8 Content-Transfer-Encoding: 8bit
9
10 With Mesa 18.1, commit be973ed21f6e, si_llvm_load_input_vs()
11 changed the number of source 32-bit wide dword components
12 used for fetching vertex attributes into the vertex shader
13 from a constant 4 to a variable num_channels number, depending
14 on input data format, with some special case handling for
15 input data formats like 64-Bit doubles.
16
17 In the case of a GL_DOUBLE input data format with one
18 or two components though, e.g, submitted via ...
19
20 a) glTexCoordPointer(1, GL_DOUBLE, 0, buffer);
21 b) glTexCoordPointer(2, GL_DOUBLE, 0, buffer);
22
23 ... the input format would be SI_FIX_FETCH_RG_64_FLOAT,
24 but no special case handling was implemented for that
25 case, so in the default path the number of 32-bit
26 dwords would be set to the number of float input components
27 derived from info->input_usage_mask. This ends with corrupted
28 input to the vertex shader, because fetching a 64-bit double
29 from the vbo requires fetching two 32-bit dwords instead of 1,
30 and fetching a two double input requires 4 dword fetches
31 instead of 2, so in these cases the vertex shader receives
32 incomplete/truncated input data:
33
34 a) float v = gl_MultiTexCoord0.x; -> v.x is corrupted.
35 b) vec2 v = gl_MultiTexCoord0.xy; -> v.x is assigned
36 correctly, but v.y is corrupted.
37
38 This happens with the standard TGSI IR compiled shaders.
39 Under NIR with R600_DEBUG=nir, we got correct behavior
40 because the current radeonsi nir code always assigns
41 info->input_usage_mask = TGSI_WRITEMASK_XYZW, thereby
42 always fetches 4 dwords regardless of what the shader
43 actually needs.
44
45 Fix this by properly assigning 2 or 4 dword fetches for
46 one or two component GL_DOUBLE input.
47
48 Fixes: be973ed21f6e ("radeonsi: load the right number of
49 components for VS inputs and TBOs")
50
51 Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
52 Cc: mesa-stable@lists.freedesktop.org
53 Cc: Marek Olšák <marek.olsak@amd.com>
54 Signed-off-by: Marek Olšák <marek.olsak@amd.com>
55 (cherry picked from commit 5e30e54e057300f65019c927482e633c367963fc)
56 ---
57 src/gallium/drivers/radeonsi/si_shader.c | 8 ++++++++
58 1 file changed, 8 insertions(+)
59
60 diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
61 index 19522cc97b..f1d5ad3136 100644
62 --- a/src/gallium/drivers/radeonsi/si_shader.c
63 +++ b/src/gallium/drivers/radeonsi/si_shader.c
64 @@ -561,6 +561,14 @@ void si_llvm_load_input_vs(
65
66 /* Do multiple loads for special formats. */
67 switch (fix_fetch) {
68 + case SI_FIX_FETCH_RG_64_FLOAT:
69 + num_fetches = 1; /* 1 2-dword or 4-dword load */
70 + fetch_stride = 0;
71 + if (util_last_bit(info->input_usage_mask[input_index]) >= 2)
72 + num_channels = 4; /* 2 doubles in 4 dwords */
73 + else
74 + num_channels = 2; /* 1 double in 2 dwords */
75 + break;
76 case SI_FIX_FETCH_RGB_64_FLOAT:
77 num_fetches = 3; /* 3 2-dword loads */
78 fetch_stride = 8;
79 --
80 2.20.1
81

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