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From cf8ce8b80f8bf9669f6ec4e71e16668430febdac Mon Sep 17 00:00:00 2001 |
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From: Russell King <rmk+kernel@armlinux.org.uk> |
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Date: Sun, 15 Dec 2019 16:39:05 +0000 |
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Subject: i2c: fix bus recovery stop mode timing |
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|
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From: Russell King <rmk+kernel@armlinux.org.uk> |
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|
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commit cf8ce8b80f8bf9669f6ec4e71e16668430febdac upstream. |
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|
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The I2C specification states that tsu:sto for standard mode timing must |
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be at minimum 4us. Pictographically, this is: |
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|
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SCL: ____/~~~~~~~~~ |
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SDA: _________/~~~~ |
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->| |<- 4us minimum |
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|
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We are currently waiting 2.5us between asserting SCL and SDA, which is |
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in violation of the standard. Adjust the timings to ensure that we meet |
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what is stipulated as the minimum timings to ensure that all devices |
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correctly interpret the STOP bus transition. |
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|
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This is more important than trying to generate a square wave with even |
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duty cycle. |
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|
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Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> |
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Signed-off-by: Wolfram Sang <wsa@the-dreams.de> |
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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|
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--- |
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drivers/i2c/i2c-core-base.c | 13 ++++++++++--- |
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1 file changed, 10 insertions(+), 3 deletions(-) |
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|
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--- a/drivers/i2c/i2c-core-base.c |
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+++ b/drivers/i2c/i2c-core-base.c |
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@@ -186,10 +186,11 @@ int i2c_generic_scl_recovery(struct i2c_ |
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* If we can set SDA, we will always create a STOP to ensure additional |
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* pulses will do no harm. This is achieved by letting SDA follow SCL |
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* half a cycle later. Check the 'incomplete_write_byte' fault injector |
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- * for details. |
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+ * for details. Note that we must honour tsu:sto, 4us, but lets use 5us |
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+ * here for simplicity. |
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*/ |
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bri->set_scl(adap, scl); |
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- ndelay(RECOVERY_NDELAY / 2); |
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+ ndelay(RECOVERY_NDELAY); |
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if (bri->set_sda) |
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bri->set_sda(adap, scl); |
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ndelay(RECOVERY_NDELAY / 2); |
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@@ -211,7 +212,13 @@ int i2c_generic_scl_recovery(struct i2c_ |
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scl = !scl; |
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bri->set_scl(adap, scl); |
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/* Creating STOP again, see above */ |
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- ndelay(RECOVERY_NDELAY / 2); |
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+ if (scl) { |
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+ /* Honour minimum tsu:sto */ |
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+ ndelay(RECOVERY_NDELAY); |
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+ } else { |
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+ /* Honour minimum tf and thd:dat */ |
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+ ndelay(RECOVERY_NDELAY / 2); |
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+ } |
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if (bri->set_sda) |
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bri->set_sda(adap, scl); |
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ndelay(RECOVERY_NDELAY / 2); |
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