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|
| 2 |
gas/config/tc-i386.c | 186 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++--------------------------------------------------------------------- |
| 3 |
1 file changed, 117 insertions(+), 69 deletions(-) |
| 4 |
|
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diff -Nurp binutils-2.37.orig/gas/config/tc-i386.c binutils-2.37/gas/config/tc-i386.c |
| 6 |
--- binutils-2.37.orig/gas/config/tc-i386.c 2021-07-08 14:37:19.000000000 +0300 |
| 7 |
+++ binutils-2.37/gas/config/tc-i386.c 2021-07-20 11:44:12.027260112 +0300 |
| 8 |
@@ -50,6 +50,13 @@ |
| 9 |
#endif |
| 10 |
#endif |
| 11 |
|
| 12 |
+#if defined(__linux__) && defined(__x86_64__) |
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+#include <sys/syscall.h> |
| 14 |
+#include <sys/personality.h> |
| 15 |
+ |
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+#define is_linux32() ((syscall(SYS_personality, 0xffffffff) & PER_MASK) == PER_LINUX32) |
| 17 |
+#endif |
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+ |
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/* Prefixes will be emitted in the order defined below. |
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WAIT_PREFIX must be the first prefix since FWAIT is really is an |
| 21 |
instruction, and so must come before any prefixes. |
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@@ -198,7 +205,18 @@ static unsigned int x86_feature_2_used; |
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static unsigned int x86_used_note = DEFAULT_X86_USED_NOTE; |
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#endif |
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|
| 26 |
-static const char *default_arch = DEFAULT_ARCH; |
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+enum x86_arch |
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+ { |
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+ ARCH_default, |
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+ ARCH_i386, |
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+ ARCH_x86_64, |
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+ ARCH_x64_32, |
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+ }; |
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+ |
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+static enum x86_arch g_default_arch = ARCH_default; |
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+static enum x86_arch get_default_arch (void); |
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+static INLINE void set_default_arch (enum x86_arch arch); |
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+static INLINE const char *get_default_arch_str (void); |
| 39 |
|
| 40 |
/* parse_register() returns this when a register alias cannot be used. */ |
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static const reg_entry bad_reg = { "<bad>", OPERAND_TYPE_NONE, 0, 0, |
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@@ -2681,7 +2699,7 @@ update_code_flag (int value, int check) |
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else |
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as_error = as_bad; |
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(*as_error) (_("64bit mode not supported on `%s'."), |
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- cpu_arch_name ? cpu_arch_name : default_arch); |
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+ cpu_arch_name ? cpu_arch_name : get_default_arch_str()); |
| 48 |
} |
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if (value == CODE_32BIT && !cpu_arch_flags.bitfield.cpui386) |
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{ |
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@@ -2690,7 +2708,7 @@ update_code_flag (int value, int check) |
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else |
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as_error = as_bad; |
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(*as_error) (_("32bit mode not supported on `%s'."), |
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- cpu_arch_name ? cpu_arch_name : default_arch); |
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+ cpu_arch_name ? cpu_arch_name : get_default_arch_str()); |
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} |
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stackop_size = '\0'; |
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} |
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@@ -2818,7 +2836,7 @@ check_cpu_arch_compatible (const char *n |
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use default_arch. */ |
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arch = cpu_arch_name; |
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if (!arch) |
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- arch = default_arch; |
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+ arch = get_default_arch_str(); |
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} |
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|
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/* If we are targeting Intel MCU, we must enable it. */ |
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@@ -3000,44 +3018,87 @@ i386_arch (void) |
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return bfd_arch_i386; |
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} |
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|
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+static enum x86_arch |
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+get_default_arch () |
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+{ |
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+ const char *default_arch_str = DEFAULT_ARCH; |
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+ |
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+ if (g_default_arch != ARCH_default) |
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+ return g_default_arch; |
| 80 |
+ |
| 81 |
+#ifdef is_linux32 |
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+ if (is_linux32 ()) |
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+ default_arch_str = "i386"; |
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+#endif |
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+ |
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+ if (!strcmp (default_arch_str, "x86_64")) |
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+ g_default_arch = ARCH_x86_64; |
| 88 |
+ else if (!strcmp (default_arch_str, "x86_64:32")) |
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+ g_default_arch = ARCH_x64_32; |
| 90 |
+ else if (!strcmp (default_arch_str, "i386")) |
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+ g_default_arch = ARCH_i386; |
| 92 |
+ |
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+ return g_default_arch; |
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+} |
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+ |
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+static INLINE const char |
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+*get_default_arch_str () |
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+{ |
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+ switch (g_default_arch) |
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+ { |
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+ case ARCH_default: |
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+ return DEFAULT_ARCH; |
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+ case ARCH_x86_64: |
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+ return "x86_64"; |
| 105 |
+ case ARCH_x64_32: |
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+ return "x86_64:32"; |
| 107 |
+ case ARCH_i386: |
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+ return "i386"; |
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+ default: |
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+ return "noarch"; |
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+ } |
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+} |
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+ |
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+static INLINE void |
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+set_default_arch (arch) |
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+ enum x86_arch arch; |
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+{ |
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+ g_default_arch = arch; |
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+} |
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+ |
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unsigned long |
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i386_mach (void) |
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{ |
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- if (startswith (default_arch, "x86_64")) |
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+ switch (get_default_arch ()) |
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{ |
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- if (cpu_arch_isa == PROCESSOR_L1OM) |
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- { |
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- if (OUTPUT_FLAVOR != bfd_target_elf_flavour |
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- || default_arch[6] != '\0') |
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+ case ARCH_x86_64: |
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+ if (cpu_arch_isa == PROCESSOR_L1OM) |
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+ { |
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+ if (OUTPUT_FLAVOR != bfd_target_elf_flavour) |
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+ as_fatal (_("Intel L1OM is 64bit ELF only")); |
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+ return bfd_mach_l1om; |
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+ } |
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+ else if (cpu_arch_isa == PROCESSOR_K1OM) |
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+ { |
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+ if (OUTPUT_FLAVOR != bfd_target_elf_flavour) |
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+ as_fatal (_("Intel K1OM is 64bit ELF only")); |
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+ return bfd_mach_k1om; |
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+ } |
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+ return bfd_mach_x86_64; |
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+ |
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+ case ARCH_x64_32: |
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+ if (cpu_arch_isa == PROCESSOR_L1OM) |
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as_fatal (_("Intel L1OM is 64bit ELF only")); |
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- return bfd_mach_l1om; |
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- } |
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- else if (cpu_arch_isa == PROCESSOR_K1OM) |
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- { |
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- if (OUTPUT_FLAVOR != bfd_target_elf_flavour |
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- || default_arch[6] != '\0') |
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+ if (cpu_arch_isa == PROCESSOR_K1OM) |
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as_fatal (_("Intel K1OM is 64bit ELF only")); |
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- return bfd_mach_k1om; |
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- } |
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- else if (default_arch[6] == '\0') |
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- return bfd_mach_x86_64; |
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- else |
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return bfd_mach_x64_32; |
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- } |
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- else if (!strcmp (default_arch, "i386") |
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- || !strcmp (default_arch, "iamcu")) |
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- { |
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- if (cpu_arch_isa == PROCESSOR_IAMCU) |
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- { |
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- if (OUTPUT_FLAVOR != bfd_target_elf_flavour) |
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- as_fatal (_("Intel MCU is 32bit ELF only")); |
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- return bfd_mach_i386_iamcu; |
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- } |
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- else |
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+ |
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+ case ARCH_i386: |
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return bfd_mach_i386_i386; |
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+ |
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+ default: |
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+ as_fatal (_("unknown architecture")); |
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} |
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- else |
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- as_fatal (_("unknown architecture")); |
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} |
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|
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void |
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@@ -3183,7 +3244,7 @@ md_begin (void) |
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{ |
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#if defined (OBJ_COFF) && defined (TE_PE) |
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x86_dwarf2_return_column = (OUTPUT_FLAVOR == bfd_target_coff_flavour |
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- ? 32 : 16); |
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+ x86_64:3232 : 16); |
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#else |
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x86_dwarf2_return_column = 16; |
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#endif |
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@@ -5509,7 +5570,7 @@ parse_insn (char *line, char *mnemonic) |
| 196 |
else |
| 197 |
as_bad (_("`%s' is not supported on `%s%s'"), |
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current_templates->start->name, |
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- cpu_arch_name ? cpu_arch_name : default_arch, |
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+ cpu_arch_name ? cpu_arch_name : get_default_arch_str(), |
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cpu_sub_arch_name ? cpu_sub_arch_name : ""); |
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|
| 203 |
return NULL; |
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@@ -13128,7 +13189,7 @@ md_parse_option (int c, const char *arg) |
| 205 |
|| strcmp (*l, "pei-x86-64") == 0 |
| 206 |
|| strcmp (*l, "mach-o-x86-64") == 0) |
| 207 |
{ |
| 208 |
- default_arch = "x86_64"; |
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+ set_default_arch (ARCH_x86_64); |
| 210 |
break; |
| 211 |
} |
| 212 |
if (*l == NULL) |
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@@ -13148,7 +13209,7 @@ md_parse_option (int c, const char *arg) |
| 214 |
for (l = list; *l != NULL; l++) |
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if (startswith (*l, "elf32-x86-64")) |
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{ |
| 217 |
- default_arch = "x86_64:32"; |
| 218 |
+ set_default_arch (ARCH_x64_32); |
| 219 |
break; |
| 220 |
} |
| 221 |
if (*l == NULL) |
| 222 |
@@ -13161,7 +13222,7 @@ md_parse_option (int c, const char *arg) |
| 223 |
#endif |
| 224 |
|
| 225 |
case OPTION_32: |
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- default_arch = "i386"; |
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+ set_default_arch (ARCH_i386); |
| 228 |
break; |
| 229 |
|
| 230 |
case OPTION_DIVIDE: |
| 231 |
@@ -13859,39 +13920,26 @@ md_show_usage (FILE *stream) |
| 232 |
const char * |
| 233 |
i386_target_format (void) |
| 234 |
{ |
| 235 |
- if (startswith (default_arch, "x86_64")) |
| 236 |
+ switch (get_default_arch ()) |
| 237 |
{ |
| 238 |
- update_code_flag (CODE_64BIT, 1); |
| 239 |
- if (default_arch[6] == '\0') |
| 240 |
- x86_elf_abi = X86_64_ABI; |
| 241 |
- else |
| 242 |
- x86_elf_abi = X86_64_X32_ABI; |
| 243 |
- } |
| 244 |
- else if (!strcmp (default_arch, "i386")) |
| 245 |
- update_code_flag (CODE_32BIT, 1); |
| 246 |
- else if (!strcmp (default_arch, "iamcu")) |
| 247 |
- { |
| 248 |
- update_code_flag (CODE_32BIT, 1); |
| 249 |
- if (cpu_arch_isa == PROCESSOR_UNKNOWN) |
| 250 |
- { |
| 251 |
- static const i386_cpu_flags iamcu_flags = CPU_IAMCU_FLAGS; |
| 252 |
- cpu_arch_name = "iamcu"; |
| 253 |
- cpu_sub_arch_name = NULL; |
| 254 |
- cpu_arch_flags = iamcu_flags; |
| 255 |
- cpu_arch_isa = PROCESSOR_IAMCU; |
| 256 |
- cpu_arch_isa_flags = iamcu_flags; |
| 257 |
- if (!cpu_arch_tune_set) |
| 258 |
- { |
| 259 |
- cpu_arch_tune = cpu_arch_isa; |
| 260 |
- cpu_arch_tune_flags = cpu_arch_isa_flags; |
| 261 |
- } |
| 262 |
- } |
| 263 |
- else if (cpu_arch_isa != PROCESSOR_IAMCU) |
| 264 |
- as_fatal (_("Intel MCU doesn't support `%s' architecture"), |
| 265 |
- cpu_arch_name); |
| 266 |
+ case ARCH_x86_64: |
| 267 |
+ update_code_flag (CODE_64BIT, 1); |
| 268 |
+ x86_elf_abi = X86_64_ABI; |
| 269 |
+ break; |
| 270 |
+ |
| 271 |
+ case ARCH_x64_32: |
| 272 |
+ update_code_flag (CODE_64BIT, 1); |
| 273 |
+ x86_elf_abi = X86_64_X32_ABI; |
| 274 |
+ break; |
| 275 |
+ |
| 276 |
+ case ARCH_i386: |
| 277 |
+ update_code_flag (CODE_32BIT, 1); |
| 278 |
+ break; |
| 279 |
+ |
| 280 |
+ default: |
| 281 |
+ as_fatal (_("Unknown architecture")); |
| 282 |
+ break; |
| 283 |
} |
| 284 |
- else |
| 285 |
- as_fatal (_("unknown architecture")); |
| 286 |
|
| 287 |
if (cpu_flags_all_zero (&cpu_arch_isa_flags)) |
| 288 |
cpu_arch_isa_flags = cpu_arch[flag_code == CODE_64BIT].flags; |
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