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From foo@baz Tue Mar 8 08:47:19 PM CET 2022 |
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From: Marc Zyngier <maz@kernel.org> |
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Date: Sun, 17 Oct 2021 13:42:25 +0100 |
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Subject: arm64: Add HWCAP for self-synchronising virtual counter |
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|
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From: Marc Zyngier <maz@kernel.org> |
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|
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commit fee29f008aa3f2aff01117f28b57b1145d92cb9b upstream. |
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|
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Since userspace can make use of the CNTVSS_EL0 instruction, expose |
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it via a HWCAP. |
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|
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Suggested-by: Will Deacon <will@kernel.org> |
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Acked-by: Will Deacon <will@kernel.org> |
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Signed-off-by: Marc Zyngier <maz@kernel.org> |
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Link: https://lore.kernel.org/r/20211017124225.3018098-18-maz@kernel.org |
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Signed-off-by: Will Deacon <will@kernel.org> |
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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--- |
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Documentation/arm64/cpu-feature-registers.rst | 12 ++++++++++-- |
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Documentation/arm64/elf_hwcaps.rst | 4 ++++ |
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arch/arm64/include/asm/hwcap.h | 1 + |
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arch/arm64/include/uapi/asm/hwcap.h | 1 + |
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arch/arm64/kernel/cpufeature.c | 3 ++- |
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arch/arm64/kernel/cpuinfo.c | 1 + |
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6 files changed, 19 insertions(+), 3 deletions(-) |
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|
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--- a/Documentation/arm64/cpu-feature-registers.rst |
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+++ b/Documentation/arm64/cpu-feature-registers.rst |
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@@ -235,7 +235,15 @@ infrastructure: |
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| DPB | [3-0] | y | |
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+------------------------------+---------+---------+ |
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|
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- 6) ID_AA64MMFR2_EL1 - Memory model feature register 2 |
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+ 6) ID_AA64MMFR0_EL1 - Memory model feature register 0 |
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+ |
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+ +------------------------------+---------+---------+ |
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+ | Name | bits | visible | |
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+ +------------------------------+---------+---------+ |
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+ | ECV | [63-60] | y | |
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+ +------------------------------+---------+---------+ |
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+ |
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+ 7) ID_AA64MMFR2_EL1 - Memory model feature register 2 |
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|
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+------------------------------+---------+---------+ |
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| Name | bits | visible | |
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@@ -243,7 +251,7 @@ infrastructure: |
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| AT | [35-32] | y | |
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+------------------------------+---------+---------+ |
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|
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- 7) ID_AA64ZFR0_EL1 - SVE feature ID register 0 |
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+ 8) ID_AA64ZFR0_EL1 - SVE feature ID register 0 |
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|
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+------------------------------+---------+---------+ |
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| Name | bits | visible | |
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--- a/Documentation/arm64/elf_hwcaps.rst |
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+++ b/Documentation/arm64/elf_hwcaps.rst |
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@@ -247,6 +247,10 @@ HWCAP2_MTE |
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Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described |
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by Documentation/arm64/memory-tagging-extension.rst. |
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|
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+HWCAP2_ECV |
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+ |
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+ Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001. |
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+ |
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4. Unused AT_HWCAP bits |
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----------------------- |
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|
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--- a/arch/arm64/include/asm/hwcap.h |
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+++ b/arch/arm64/include/asm/hwcap.h |
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@@ -105,6 +105,7 @@ |
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#define KERNEL_HWCAP_RNG __khwcap2_feature(RNG) |
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#define KERNEL_HWCAP_BTI __khwcap2_feature(BTI) |
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#define KERNEL_HWCAP_MTE __khwcap2_feature(MTE) |
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+#define KERNEL_HWCAP_ECV __khwcap2_feature(ECV) |
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|
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/* |
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* This yields a mask that user programs can use to figure out what |
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--- a/arch/arm64/include/uapi/asm/hwcap.h |
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+++ b/arch/arm64/include/uapi/asm/hwcap.h |
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@@ -75,5 +75,6 @@ |
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#define HWCAP2_RNG (1 << 16) |
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#define HWCAP2_BTI (1 << 17) |
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#define HWCAP2_MTE (1 << 18) |
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+#define HWCAP2_ECV (1 << 19) |
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|
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#endif /* _UAPI__ASM_HWCAP_H */ |
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--- a/arch/arm64/kernel/cpufeature.c |
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+++ b/arch/arm64/kernel/cpufeature.c |
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@@ -279,7 +279,7 @@ static const struct arm64_ftr_bits ftr_i |
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}; |
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|
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static const struct arm64_ftr_bits ftr_id_aa64mmfr0[] = { |
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- ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_ECV_SHIFT, 4, 0), |
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+ ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_ECV_SHIFT, 4, 0), |
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ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_FGT_SHIFT, 4, 0), |
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ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_EXS_SHIFT, 4, 0), |
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/* |
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@@ -2455,6 +2455,7 @@ static const struct arm64_cpu_capabiliti |
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#ifdef CONFIG_ARM64_MTE |
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HWCAP_CAP(SYS_ID_AA64PFR1_EL1, ID_AA64PFR1_MTE_SHIFT, FTR_UNSIGNED, ID_AA64PFR1_MTE, CAP_HWCAP, KERNEL_HWCAP_MTE), |
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#endif /* CONFIG_ARM64_MTE */ |
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+ HWCAP_CAP(SYS_ID_AA64MMFR0_EL1, ID_AA64MMFR0_ECV_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_ECV), |
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{}, |
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}; |
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|
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--- a/arch/arm64/kernel/cpuinfo.c |
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+++ b/arch/arm64/kernel/cpuinfo.c |
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@@ -94,6 +94,7 @@ static const char *const hwcap_str[] = { |
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[KERNEL_HWCAP_RNG] = "rng", |
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[KERNEL_HWCAP_BTI] = "bti", |
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[KERNEL_HWCAP_MTE] = "mte", |
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+ [KERNEL_HWCAP_ECV] = "ecv", |
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}; |
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|
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#ifdef CONFIG_COMPAT |
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