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From f015ef72970828e8b64c8acc19493da5caced52d Mon Sep 17 00:00:00 2001 |
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From: Sasha Levin <sashal@kernel.org> |
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Date: Wed, 26 Jan 2022 15:55:40 +0100 |
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Subject: arm64: dts: rockchip: reorder rk3399 hdmi clocks |
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From: Sascha Hauer <s.hauer@pengutronix.de> |
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[ Upstream commit 2e8a8b5955a000cc655f7e368670518cbb77fe58 ] |
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The binding specifies the clock order to "cec", "grf", "vpll". Reorder |
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the clocks accordingly. |
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> |
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Link: https://lore.kernel.org/r/20220126145549.617165-19-s.hauer@pengutronix.de |
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Signed-off-by: Heiko Stuebner <heiko@sntech.de> |
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Signed-off-by: Sasha Levin <sashal@kernel.org> |
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--- |
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arch/arm64/boot/dts/rockchip/rk3399.dtsi | 6 +++--- |
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1 file changed, 3 insertions(+), 3 deletions(-) |
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diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi |
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index 3871c7fd83b0..00f1d036dfe0 100644 |
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--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi |
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+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi |
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@@ -1802,10 +1802,10 @@ |
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interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH 0>; |
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clocks = <&cru PCLK_HDMI_CTRL>, |
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<&cru SCLK_HDMI_SFR>, |
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- <&cru PLL_VPLL>, |
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+ <&cru SCLK_HDMI_CEC>, |
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<&cru PCLK_VIO_GRF>, |
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- <&cru SCLK_HDMI_CEC>; |
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- clock-names = "iahb", "isfr", "vpll", "grf", "cec"; |
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+ <&cru PLL_VPLL>; |
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+ clock-names = "iahb", "isfr", "cec", "grf", "vpll"; |
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power-domains = <&power RK3399_PD_HDCP>; |
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reg-io-width = <4>; |
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rockchip,grf = <&grf>; |
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-- |
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2.34.1 |
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